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Authored By
•
ema
May 12 2017, 4:11 PM
2017-05-12 16:11:44 (UTC+0)
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402 B
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varnishtest "hit-for-pass transient memory"
server s1 {
rxreq
txresp
} -start
varnish v1 -vcl+backend {
sub vcl_backend_response {
set beresp.ttl = 0s;
set beresp.uncacheable = true;
return (deliver);
}
} -start
client c1 {
txreq
rxresp
delay 2
} -run
varnish v1 -expect SMA.Transient.c_bytes == 200
varnish v1 -expect SMA.Transient.c_freed == 0
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P5437 (An Untitled Masterwork)
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